Board pinout reference guide
STM32 boards
| Board | UART,TX,RX | Ethernet | LED | Doc |
|---|---|---|---|---|
| STM32H747I-DISCO | USART1,A9,A10 | A1,A2,A7,C1,C4,C5,G11,G12,G13 | I12,I13,I14 | UM2411 |
| STM32H735G-DK | USART3,D8,D9 | A1,A2,A7,C1,C4,C5,B11,B12,B13 | C3,C2 | UM2679 |
| STM32H573I-DK | USART1,A9,A10 | A1,A2,A7,C1,C4,C5,G11,G12,G13 | I8,I9,F1 | UM3143 |
| Nucleo-N657X0-Q | USART1,E5,E6 | F4,F5,F7,F10,F11,F12,F13,F14,F15 | G0,G8,G10 | UM3417 |
| Nucleo-H563ZI | USART3,D8,D9 | A1,A2,A7,C1,C4,C5,B15,G11,G13 | B0,F4,G4 | UM3115 |
| Nucleo-H7S3L8 | USART3,D8,D9 | A2,A7,B6,G4,G5,G6,G11,G12,G13 | D10,D13,B7 | UM3276 |
| Nucleo-H745ZI-Q | USART3,B10,B11 | A1,A2,A7,C1,C4,C5,B13,G11,G13 | I13,J2,D3 | UM2408 |
| Nucleo-H755ZI-Q | USART3,D8,D9 | A1,A2,A7,C1,C4,C5,G11,G12,G13 | B0,E1,B14 | UM2408 |
| Nucleo-H753ZI | USART3,D8,D9 | A1,A2,A7,C1,C4,C5,B11,B12,B13 | C3,C2,C2 | UM2407 |
| Nucleo-H743ZI | USART3,D8,D9 | A1,A2,A7,C1,C4,C5,B13,G11,G13 | B0,E1,B14 | UM2407 |
| Nucleo-H723ZG | USART3,D8,D9 | A1,A2,A7,C1,C4,C5,B13,G11,G13 | B0,E1,B14 | UM2407 |
| Nucleo-Fxxxxx | USART3,D8,D9 | A1,A2,A7,C1,C4,C5,B13,G11,G13 | B0,B7,B14 | UM1974 |
NXP boards
| Board | UART, TX, RX | Ethernet | LED |
|---|---|---|---|
| MIMXRT1020-EVK | LPUART2, B1_08, B1_09 | B0_08, B0_09, B0_10, B0_11, B0_12, B0_13, B0_14, B0_15, EMC_40, EMC_41 | B0_05 |
| MIMXRT1024-EVK | LPUART1, B0_06, B0_07 | B0_08, B0_09, B0_10, B0_11, B0_12, B0_13, B0_14, B0_15, EMC_40, EMC_41 | B0_24 |
| MIMXRT1040-EVK | LPUART1, B0_12, B0_13 | B1_04, B1_05, B1_06, B1_07, B1_08, B1_09, B1_10, B1_11, EMC_40, EMC_41 | B0_08 |
| MIMXRT1060-EVK | LPUART3, B0_06, B0_07 | B1_04, B1_05, B1_06, B1_07, B1_08, B1_09, B1_10, B1_11, EMC_40, EMC_41 | B0_08 |
| MIMXRT1064-EVK | LPUART1, B0_12, B0_13 | B1_04, B1_05, B1_06, B1_07, B1_08, B1_09, B1_10, B1_11, EMC_40, EMC_41 | B0_08 |
ESP32 reference
- R column (reset state)
- 0: input disabled
- 1: input enabled
- 2: input enabled, pull down
- 3: input enabled, pull up
- Strapping pins:
- 0: high - boot from flash, low - enter boot loader mode
- 2: low when pin 0 is low
- 12: if high, boot fail
- 15: if low, boot messages are not printed
- N column (special notes): R: RTC/Analog, I: Input Only
- Colors: strapping, internal flash, input only
| Pin | F1 | F2 | F3 | F4 | F5 | R | N |
|---|---|---|---|---|---|---|---|
| 0 | GPIO0 | CLK_OUT1 | - | - | ETH_TX_CLK | 3 | R |
| 1 | U0TXD | CLK_OUT3 | - | - | ETH_RXD2 | 3 | - |
| 2 | GPIO2 | HSPIWP | HS2_DATA0 | SD_DATA0 | - | 2 | R |
| 3 | U0RXD | CLK_OUT2 | - | - | - | 3 | - |
| 4 | GPIO4 | HSPIHD | HS2_DATA1 | SD_DATA1 | ETH_TX_ER | 2 | R |
| 5 | GPIO5 | VSPICS0 | HS1_DATA6 | - | ETH_RX_CLK | 3 | - |
| 6 | SD_CLK | SPICLK | HS1_CLK | U1CTS | - | 3 | - |
| 7 | SD_DATA_0 | SPIQ | HS1_DATA0 | U2RTS | - | 3 | - |
| 8 | SD_DATA_1 | SPID | HS1_DATA1 | U2CTS | - | 3 | - |
| 9 | SD_DATA_2 | SPIHD | HS1_DATA2 | U1RXD | - | 3 | - |
| 10 | SD_DATA_3 | SPIWP | HS1_DATA3 | U1TXD | - | 3 | - |
| 11 | SD_CMD | SPICS0 | HS1_CMD | U1RTS | - | 3 | - |
| 12 | MTDI | HSPIQ | HS2_DATA2 | SD_DATA2 | ETH_TXD3 | 2 | R |
| 13 | MTCK | HSPID | HS2_DATA3 | SD_DATA3 | ETH_RX_ER | 2 | R |
| 14 | MTMS | HSPICLK | HS2_CLK | SD_CLK | ETH_TXD2 | 3 | R |
| 15 | MTDO | HSPICS0 | HS2_CMD | SD_CMD | ETH_RXD3 | 3 | R |
| 16 | GPIO16 | - | HS1_DATA4 | U2RXD | ETH_CLK_OUT | 1 | - |
| 17 | GPIO17 | - | HS1_DATA5 | U2TXD | ETH_CLK_180 | 1 | - |
| 18 | GPIO18 | VSPICLK | HS1_DATA7 | - | - | 1 | - |
| 19 | GPIO19 | VSPIQ | U0CTS | - | ETH_TXD0 | 1 | - |
| 21 | GPIO21 | VSPIHD | - | - | ETH_TX_EN | 1 | - |
| 22 | GPIO22 | VSPIWP | U0RTS | - | ETH_TXD1 | 1 | - |
| 23 | GPIO23 | VSPID | HS1_STROBE | - | - | 1 | - |
| 25 | GPIO25 | - | - | - | ETH_RXD0 | 0 | R |
| 26 | GPIO26 | - | - | - | ETH_RXD1 | 0 | R |
| 27 | GPIO27 | - | - | - | ETH_RX_DV | 0 | R |
| 32 | 32K_XP | - | - | - | - | 0 | R |
| 33 | 32K_XN | - | - | - | - | 0 | R |
| 34 | VDET_1 | - | - | - | - | 0 | RI |
| 35 | VDET_2 | - | - | - | - | 0 | RI |
| 36 | S_VP | - | - | - | - | 0 | RI |
| 37 | S_CAPP | - | - | - | - | 0 | RI |
| 38 | S_CAPN | - | - | - | - | 0 | RI |
| 39 | S_VN | - | - | - | - | 0 | RI |